Problem $2(20$ Points$)$

Assume the elements in the RISC$-$V single$-$cycle datapath and control have the following delays in picoseconds $($ignore the delay time through the Control Unit$).$

$\backslash$table$[[$Element$,$Parameter,Delay $($ps$)],[$PC clock$-$to$-$Q$,$t$\_($pcq$\_$PC $),30],[$Multiplexer$,$t$\_($mux $),25],[$ALU$,$t$\_($ALU$),200],[\backslash$table$[[$Data and Instruction Memory$],[($read or write$)]],$t$\_($mem $),250],[$Register file $($read or write$),$t$\_($RF$),150],[$Plus $4$ Adder,t$\_($add$4),70],[$Extend unit,t$\_($ext $),15]]$

For each one of the following two instructions, calculate the total time in $ps$ needed from the moment the clock edge triggers the PC to read the instruction address until the data is ready to be written to its destination $($register file or data memory$)$ right before the next clock edge. Show all steps of your calculations.

Note: This is not the $T_c$ we calculated in the lecture and hence no need to consider the setup time of the register file or the data memory.

$i.$ add $t1,t2,t3$

$ii.swt0,32(s3)$