Problem 2: (50%) This problem consists of two questions Q1 and Q2 and considers the basic MIPS 5-stage pipeline (F, D, EX, M, WB). (For this problem, you should assume that there is full forwarding.) Q1 Show how the instructions below proceed through the pipeline and indicate how many pipeline stall cycles occur. You should assume the beg instruction is taken. Use (30 marks) 1 23 456 78910 11 12 13 14 15 the following chart (extend the number of columns if needed) add $t1, $s0, $t1l lw t2, (St1) addi $s1, $s1,1 slti St3, St2, 50 beq $t3, 1, iF addi $s2, $s2, 1 j loop F: addi s3, $s3, 1 Q2 Assume the following sequence of instructions is executed in a traditional 5-stage pipeline. Does the lwladd instruction combination represent a data hazard? If so, why? If not, why not? (20 marks) $5, 4 ($6) add $6, $5, $10 sub 7, $6, s5