PROBLEM 3: (20 POINTS) Assume that you have a processor with the following specifications: Five pipeline stages as seen in the lecture notes (IF, ID, AL, ME, WB): . Register write and register read can happen in the same clock cycle; With the following code fragment: ADD X8, X5, X5 SUB X8, X8, x10 LDUR X6, [x8,4] ADD X4, X6, x8 A. (5 points) Point all the dependencies you see in this code. Make sure that you clearly indicate which instructions and registers are involved in each dependency B. (5 points) Assume that no forwarding logic exists. How many cycles are required to execute all instructions? What is the CPI of the processor on this program