Problem 3 20 points Imagine that you are a hardware designer who wants to add a new instruction to the MIPS ISA. Our new instruction has the following syntax: swr $rd, Srt (Srs). This instruction is very similar to the store- word instruction. The only difference is that in a store-word the offset is specified as an immediate constant whereas here the offset is a register operand (Srt). This instruction will store a 32-bit number present in Srt to a memory location whose address is given by $rt + $rs. Assume that we have found a way of encoding this instruction into 32-bit machine code using the R-type encoding format. We now want to modify the single-cycle datapath in Figure 1 to support the execution of this instruction 1. Which new blocks (if any) do we need to add to support execution of this instruction? Please de- scribe briefly and draw a neat figure to reflect the new design. Your goal must be to make minimum modifications to existing hardware 2. What new control signals (if any) do we need from the control unit to support this instruction? 3. Write the values for following control signals as well as any new control signals you may have added RegDst, ALUOp, ALUSrc, Branch, MemRead, MemWrite, MemtoReg Problem 3 20 points Imagine that you are a hardware designer who wants to add a new instruction to the MIPS ISA. Our new instruction has the following syntax: swr $rd, Srt (Srs). This instruction is very similar to the store- word instruction. The only difference is that in a store-word the offset is specified as an immediate constant whereas here the offset is a register operand (Srt). This instruction will store a 32-bit number present in Srt to a memory location whose address is given by $rt + $rs. Assume that we have found a way of encoding this instruction into 32-bit machine code using the R-type encoding format. We now want to modify the single-cycle datapath in Figure 1 to support the execution of this instruction 1. Which new blocks (if any) do we need to add to support execution of this instruction? Please de- scribe briefly and draw a neat figure to reflect the new design. Your goal must be to make minimum modifications to existing hardware 2. What new control signals (if any) do we need from the control unit to support this instruction? 3. Write the values for following control signals as well as any new control signals you may have added RegDst, ALUOp, ALUSrc, Branch, MemRead, MemWrite, MemtoReg