Problem 3 (20 pts) The classic pipeline design has 5 stages: IF, ID, EX, MEM, and WB. Consider the following program, which searches an area of memory and counts the number of times that the value of a word fetched from memory is equal to a value stored in R'2 LW R5, 0 (R3) BNE R5, R2, NOMATCH ADDI R1 , R1 , #1 ADDI R3, R3,#4 BNE R4,R3, SEARCH /I1 Load item /I2 Check for match /I3 Count matches /I4 Next item /I5 Continue until all items SEARCH: NOMATCH Full forwarding is provided by the hardware. Both branches are always predicted untaken. Please answer the following questions for each loop iteration, except the last one. [Hint 1: Bubbles may be needed between the end of a loop and the beginning of the next loop because of mis-prediction.] [Hint 2: Consider "steady-state". Different from Problem 2, the instruction sequence here is not executed once but many times. The number of cycles of one iteration is the time interval from one Lw to the next LW.] 3.1) If branch data are needed in the EX stage and results are determined in the MEM stage, how many clock cycles does it take to execute one iteration of the loop on a match? 3.2) If branch data are needed in the EX stage and results are determined in the MEM stage, how many clock cycles does it take to execute one iteration of the loop on NO match? 3.3) If branch results are determined in the ID stage, how many clock cycles does it take to execute one iteration of the loop on a match? You can assume that branch data are needed in the ID stage and two more forwarding paths are provided: from EX/MEM to ID and from MEM/WB to ID. 3.4) If branch results are determined in the ID stage similar to the above question, how many clock cycles does it take to execute one iteration of the loop on NO match