Question: Problem 3: Cache Performance Optimization (15+15=30) A. The L1 cache takes 1 cycle to access and has a 5% miss rate, L2 cache takes

Problem 3: Cache Performance Optimization (15+15=30) A. The L1 cache takes 1 cycle to access and has a 5%

Problem 3: Cache Performance Optimization (15+15=30) A. The L1 cache takes 1 cycle to access and has a 5% miss rate, L2 cache takes 2 cycles to access and has a 30% miss rate, and main memory takes 200 cycles to access. Please calculate the average memory access time. B. Average memory stalls per instruction is defined by the following equation. Let's consider that all the instructions are memory references (i.e., miss rate is equal to misses per instruction for the particular cache). What would be the Average memory stalls per instruction in this case? Average memory stalls per instruction = Misses per instruction1 Hit timer2 Misses per instruction 12 X Miss penaltyL2

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