Problem $3$: Consider a multi$-$layer perceptron $($MLP$)$ with $4$ layers $($one input layer, two hidden

layers and one output layers$).$ The number of inputs to the MLP is $10$ and the number of

outputs is $5.$ First hidden layer consists of $8$ neurons and the second hidden layer consists of

$6$ neurons. Now consider two different hardware implementations of DNNs$.$ Implementation

shown in Figure $($a$)$ consists of a multiplier and an accumulator unit at each neuron. Moreover,

each neuron consists of a non$-$linear operation. Implementation shown in Figure $($b$)$ consists

of three neural functional units $($NFUs$).$ First NFU performs multiplication. Second NFU

performs accumulation $($consider one$-$shot addition as opposed to adder$-$tree shown in the

figure$).$ Third NFU performs non$-$linear operation. Assume each multiplication takes $8$ cycles,

each addition takes $2$ cycles and each non$-$linear operation takes $1$ cycle. Assuming, both

hardware are programmed to explore its full capability $($e$.$g$.,$ highest parallelism, highest

utilization$),$ how many cycle will it take to execute the above mentioned MLP$.$ Assume each

neuron consists of a non$-$linear operation. $(2\mathrm{.}5+2\mathrm{.}5)$

$($a$)$

$($b$)$