Problem $4(21$ points total; $7$ points per part$)$

Implement the logic $x=AC\frac{+}{b}ar\frac{D}{b}ar(C)$ and $Y=$ACD$\frac{+}{b}ar(D)$ on both a decoder and a programable logic array $($PLA$).$ You may treat the system as if it has $3$ inputs $($A$,$ C$,$ and D$)$ and $2$ outputs $($ X and Y $).$ Additionally, state the size of a memory array with $8$ address bits and $16$ data bits.