Problem $4$

A $2-$way set associative cache which uses blocks of $8$ bytes is interfaced to the MIPS machine. The cache size is $64$ bytes. The replacement algorithm used is $LR{U}_{?}.$ Knowing that, solve the following:

What is the total number of storage bits in the cache including valid bits, dirty bits, tags and cache data?

Consider the following sequence of memory accesses, given as byte addresses:

$16,9,20,24,25,12,25,26,28,40,29,30,50$

Label each reference in the list as a hit or a miss; show your work clearly, cache is NOT empty initially, as seen below.

$\backslash$table$[[$index$,D,V,$Tag,Data,$D,V,$Tag,Data,$],[00,0,0,0,x,,1,1,1,x$