Problem $5(28$ points total, $7$ points per part$)$

Suppose we are given a direct$-$mapped cache with $8$ sets, $1$ word$/$set$,$ and a byte offset of $00.$ The byte offset essentially tells us to drop the $2$ lowest bits from the address before mapping the next $3$ bits to the proper set in the cache. The initial state of the cache and the program to use to answer the questions is shown here:

Set $7(111)$ mov r$1,$ #$0$

mov r$0,$ #$3$

There is no

$5$ tall.

cmp r$0,$ #$0$

beq DONE

$1$dr r$3,[$r$1,$ #$0$x$4]$ OOI

ldr r$4,[$r$1,$ #$0$x$8]$ O$/$O

ldr r$5,[$r$1,$ #$0$x$24]$ OOI

sub r$0,$ r$0,$ #$1$

b LOOP

DONE:

a$)$ How many cycles are required to run the program on the multicycle ARM processor? Assume that mov and cmp follow the standard rules of data processing instructions in terms of cycles used. What is the CPI of this processor for this program?

b$)$ How many cycles are required to run the program on the pipelined ARM processor $($equipped with a hazard control unit$)$ if we assume that we always predict to take the branch when encountering a binstruction? Also assume that mov and cmp follow the standard rules of data processing instructions in terms of cycles used. What is the CPI of this processor for this program?

c$)$ For the given program, what would be the miss rate for this particular cache? Provide both the total number of misses and the total number of opportunities as the two values that are used to calculate the rate. You may $($but are not required to$)$ fill in appropriate tag and data values to help you and to show your work.

d$)$ What is the average memory access time of a machine whose hit rate and miss rate can be found using the information from part c $,$ with a cache access time of $8$ ns and a main memory access time of $80$ ns $?$

Reference table for different instruction types: