Problem Description:

Design a digital circuit to execute only one of the following functions of your choice:

$-8-$bits Up and Down Counter with Load Bits and Reset options

The circuit design should be verified through:

$1-$ Circuit Schematic Simulation using Falstad

$2-$ VHDL Logic and Testbench Code Simulations

Deliverables:

$2-$ PDF Report to show your design steps, including truth tables, K$-$maps $($clearly show your attempts to solve the problem$),$ and the circuit schematic screenshots. You may include the VHDL Codes as screenshots on the report or share them in separate files attached to the report. The report should also include a complete brief description explaining the logical workings of the circuit design.