Problem Statement:

Given the transistor circuit shown above. Assume the capacitors, i$.$e$.$ C$1$ and C$2$ are infinite in capacitance, and offer no AC impedance to small signal AC$.$ Assume that Beta $=100.$

Design this circuit and determine R$1,$ R$2,$ and Rc$,$ such that the transistor output voltage is biased at approximately $7\mathrm{.}5$ volts, and the transistor circuit AC gain has a magnitude of at least $3.$ Gain $=$ Vo$/$Vii$.$

Question: Assuming a sinusoidal input voltage swing, what is the maximum zero to peak input voltage swing allowed before distortion would start taking place.

Use the hybrid$-$pi model to solve the problem.

Determine the quiescent $($DC$)$ power that must be dissipated by the transistor itself. Problem Statement:

Given the transistor circuit shown above. Assume the capacitors, i$.$e$.$ C$1$ and C$2$ are infinite in capacitance, and offer no AC impedance to small signal AC$.$ Assume that Beta $\backslash (=100\backslash ),$

Design this circuit and determine R$1,$ R$2,$ and Rc$,$ such that the transistor output voltage is biased at approximately $7\mathrm{.}5$ volts, and the transistor circuit $\backslash ($ A C $\backslash )$ gain has a magnitude of at least $3,$ Gain $\backslash (=\backslash )$ Vo$/$Vii$.$

Question: Assuming a sinusoidal input voltage swing, what is the maximum zero to peak input voltage swing allowed before distortion would start taking place,

Use the hybrid$-$pi model to solve the problem.

Determine the quiescent $($DC$)$ power that must be dissipated by the transistor itself.