Project goals:

The project aims to develop an embedded system application using VHDL on the Zybo Z$7$

FPGA development board to achieve the following goals:

Design and implement a functional counter that starts from $"00"$ and increments

sequentially.

Display specific letters or numbers, after reaching certain counts.

Implement a one$-$second delay between each increment for clear display and user

interaction.

List of materials used:

Zybo Z$7$ Development Board

$7-$Segment Display

Xilinx Vivado software for FPGA development

VHDL Programming Environment

Computer

Connections and Cables

Include the VHDL code and the constraint file