Q$4)$

Implement the following Boolean function with a $41$ multiplexer, a $2-$to$-4-$line decoder, two inverters and an OR gate.

$F(A,B,C,D)=AB{C}^{\text{'}}+A{B}^{\text{'}}C+AB{D}^{\text{'}}+A{B}^{\text{'}}D+A^{\text{'}}{B}^{\text{'}}C{D}^{\text{'}}+A^{\text{'}}BCD+A^{\text{'}}{B}^{\text{'}}{C}^{\text{'}}D$

Digital Logic Design $-$ HWW$2$

Page: $2$ of $3$I need the truth table for the question and the full implementation and the circuit please I need you to draw the combinational circuit for the question and more detailed information about the mux