Q$\mathrm{.}4.$ Memory Hierarchy

$[20$ marks$]$

Consider a computer system with a cache memory organized as a $4-$way set associative cache. The cache has a block Size of $16$ Bytes and a total size of $64$ KB $.$

The sequence of memory addresses of the first column in the below table need to be accessed in the shown order:

$\backslash$begin$\{$tabular$\}\{||$l$||$c$||$c$||$l$||$l$||\}$

$\backslash$hline $\backslash$begin$\{$tabular$\}\{$c$\}$

Memory $\backslash \backslash$

Address

$\backslash$end$\{$tabular$\}$ & $\backslash$begin$\{$tabular$\}\{$c$\}$

Block $\backslash \backslash$

Address $\backslash \backslash$

$($decimal$)$

$\backslash$end$\{$tabular$\}$ & $\backslash$begin$\{$tabular$\}\{$c$\}$

Set Index $\backslash \backslash$

$($decimal$)$

$\backslash$end$\{$tabular$\}$ & $\backslash$begin$\{$tabular$\}\{$c$\}$

Hit$/\backslash \backslash$

Miss

$\backslash$end$\{$tabular$\}$ & $\backslash \backslash$

$\backslash$hline $\backslash$hline $\backslash (0\backslash$times $0000\backslash )$ & & & & Block is added to set $?\backslash \backslash$

$\backslash$hline $\backslash$hline $\backslash (0\backslash$times $0010\backslash )$ & & & & $\backslash \backslash$

$\backslash$hline $\backslash$hline $\backslash (0\backslash$times $0020\backslash )$ & & & & $\backslash \backslash$

$\backslash$hline $\backslash$hline $\backslash (0\backslash$times $0010\backslash )$ & & & & $\backslash \backslash$

$\backslash$hline $\backslash (0\backslash$times $0000\backslash )$ & & & & $\backslash \backslash$

$\backslash$hline $\backslash$hline $\backslash (0\backslash$times $0040\backslash )$ & & & $\backslash \backslash$

$\backslash$hline $\backslash$hline $\backslash (0\backslash$times $0000\backslash )$ & & & $\backslash \backslash$

$\backslash$hline $\backslash$hline $\backslash (0\backslash$times $0040\backslash )$ & & & $\backslash \backslash$

$\backslash$hline

$\backslash$end$\{$tabular$\}$

$1.$ Calculate the number of sets in the cache.

$2.$ Determine which addresses map to which sets.

$3.$ Trace the access pattern to identify hits and misses in the cache.

$[$Use the above table or repeat it in your answer$]$

$4.$ Calculate the hit ratio for the given sequence of memory accesses.