Question: Q . 5 . Answer in brief: ( a ) What is the purpose of using single length, double length and long lines for the

Q.5. Answer in brief:
(a) What is the purpose of using single length, double length and long lines for the programmable interconnects inside an FPGA.
(b) Why the FPGAs are usually classified as fine-grained and coarse-grained devices? What are the pros and cons of each device?
(c) In Verilog, what is the disadvantage of defining delays in the beginning of the statement inside an always block? Explain using an example.
(d) If you were to design a module that contains a mix of combinational and sequential statements inside a single always block, which type of assignment operators will you use - blocking (used for combinational logic) or non-blocking (used for sequential logic)? Why?
(e) Scheduling events using ASAP and ALAP algorithms serve different requirements, in terms of required resources and latency. Using an example, show which algorithm is suitable for meeting the requirements.
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[2\times 5=10]
\]
Q . 5 . Answer in brief: ( a ) What is the

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