Question: Q 6 Suppose that in 1 0 0 0 memory references there are 6 0 misses in the first level cache and 3 0 misses
Q Suppose that in memory references there are misses in the first level cache and misses in the secondlevel cache.
a marks What are the local miss rate and global miss rate of each cache?
b marks Assume the miss penalty from the L cache to memory is clock cycles, the hit time of the L cache is clock cycle, the hit time of L is clock cycle. What is the average memory access time? ignore the impact of writes
c marks What would be the average memory access time if we just have the L cache ie we remove the L cache Note that the penalty of L in this case will be clock cycles.
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