q$)$ You are to design a cache for a microprocessor with $32$ address lines and $64$ data lines. Your design should conform to the following specifications:

Total cache capacity: $1MB$

Associativity: $4-$way set associative

Bytes per block: $256$

Determine each of the following:

Number of blocks per set

Total number of blocks in the cache

Total number of sets in the cache

Size $($number of bits$)$ of the tag, index, and offset fields in the address

r$)$ Which of the two approaches for handling cache writes is better $-$ Write Back Cache or Write Through Cache? Why?

s$)$ What is a simple input port? What is a simple output port? Explain their uses.