Q2. Choose the correct answer. Answer all the questions: (4 x 3- 12 points) 1. A gated D latch does not have a. clock input b. an enable input c. output d. steering gates 2. On a master-slave flip-flop, when is the master enabled? a. When gate is LOW b. When gate is HIGH c. Both of the above d. Neither of the above. 3. Synchronous construction reduces the delay time of a counter to the delay of a. all flip-flops and gates b. all flip-flops and gates after a 3 count c. a single gate d. a single flip-flop and a gate 4. BCD counter is a a. binary counter b. full-modulus counter c. decade counter d. divide-by-10 counter