Q2 please asap !

Q2) Write a VHDL code for a 2-bit sequence counter that counts through the binary sequence 11 10 00 01, which is stored in the ROM in Q1. The counter has a single "clk input and a single "count" output. Use the ROM from Q1 as a component in the VHDL code. (Hint: you can create the sequence counter by connecting a standard 2-bit up counter to the input of the ROM). [10 Marks] library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; entity seq_counter is port ); end seq_counter; architecture rtl of seq_counter is begin end rtl; Q1) Using a ROM, write a VHDL code that implements the following truth table [10 Marks) Inputs Outputs A B Y Z 0 0 1 1 0 1 1 0 1 0 0 0 1 1 0 1 library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; entity ROM is port ( ); end ROM; architecture rtl of ROM is begin end rtl