Question: Q3 An important issue in current highly accurate branch predictors is that most of the predictors suffer from non-trivial amounts of latency, which degrades the

 Q3 An important issue in current highly accurate branch predictors is

Q3 An important issue in current highly accurate branch predictors is that most of the predictors suffer from non-trivial amounts of latency, which degrades the performance en- hancement attained by high accuracy. This question asks you to explore the accuracy- latency trade-off for the most advanced branch prediction schemes Consider a 6 stage pipeine, IF1 IF2 ID EXE MEM WB, in which the instructionn fetch is split into two stages, IFl and IF2. An aggressive branch predictor is accessed during the IF1 stage. However, the predictor takes 1 cycle to make a decision, that is, the prediction is available at the end of the IF2 stage. Therefore, the fetch continues from the fall through path un the ID stage. Then the processor will choose the path predicted by the branch predictor. During the EXE stage, the branch condition is definitively resolved (Part A) Assume that all the branch instructions encountered are guaranteed to be found in the Branch Target Buffer (BTB), which is accessed in the IF1 stage. The prediction accuracy of the aggressive branch predictor is 90% and 60% of all the branches in the benchmark are taken. Please compute the average number of stall cycles per branch Q3 An important issue in current highly accurate branch predictors is that most of the predictors suffer from non-trivial amounts of latency, which degrades the performance en- hancement attained by high accuracy. This question asks you to explore the accuracy- latency trade-off for the most advanced branch prediction schemes Consider a 6 stage pipeine, IF1 IF2 ID EXE MEM WB, in which the instructionn fetch is split into two stages, IFl and IF2. An aggressive branch predictor is accessed during the IF1 stage. However, the predictor takes 1 cycle to make a decision, that is, the prediction is available at the end of the IF2 stage. Therefore, the fetch continues from the fall through path un the ID stage. Then the processor will choose the path predicted by the branch predictor. During the EXE stage, the branch condition is definitively resolved (Part A) Assume that all the branch instructions encountered are guaranteed to be found in the Branch Target Buffer (BTB), which is accessed in the IF1 stage. The prediction accuracy of the aggressive branch predictor is 90% and 60% of all the branches in the benchmark are taken. Please compute the average number of stall cycles per branch

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