Q5: (20 pts). Design a combinational circuit that divides a 2-bit ryimber A=(a1a0) by another 2-bit number B=(b1b0) and generates a 2-bit number D=(d1d0) lhat gives the remainder of the division (i.e. D=A%B ). Note that division-by-0 is not defined; therefore, you can assume that the input combinations causing division-by-0 are not applied. Use AND, OR and NOT gates. a) (5 pts). Complete the truth table: b) (5 pts). Derive the optimized output equations using 1's in the Kamaugh maps. c) (5 pts). Draw the circuit for simplified equations of d0 and d1 output. d) (5 pts). Implement d, output using the smallest multiplexer. Do not use any other gate. Just show the selection inputs (Si) and data inputs (ii) of the multiplexer