Question $10$

Given the figure below, consider the scenario. Processor$2$

accesses the memory, and is being serviced by the arbiter.

Next, Processor$3$ accesses the memory, and then

Processor$1$ accesses the memory. Which processor is

serviced next?

$zero: $00000$

$t$0$: $01000$

$$11$:$01001$

$ t$2$: $01010$

$$13$: $01011$

$t$4$: $01100$

$ t$5$: $01101$

$t$6$: $01110$

Processor$2$

Processor$3$

An error will occur due to two processor requests coming in$.$

Processor$1$