Question: Question 1 ( 6 0 points ) . The program described below runs on a multiple issue processor with a 3 - level CPU cache,

Question 1(60 points). The program described below runs on a multiple issue processor with a 3-
level CPU cache, a 4 GHz (1GHz=10^9Hz) clock frequency, and the following performance
metrics: (IPC: instructions per cycle)
Level Miss Penalty R/W Data Miss Rate Instruction Miss Rate
L1 cache 25%2%
L2 cache 52%1.3%
Main 1000.3%0.1%
Instruction Class Instruction Count IPC
Branch/Jump 21051.1
Load/Store 4.11040.9
Arithmetic 3.61061.5
Float Add 5.51050.25
a).(15 pts) What is the base CPU time of the program (without consider the memory stall time)?
b).(15 pts) What is the amount of time (in second) consumed by memory-stall clock cycles? Assume
equal read/write miss penalty and negligible write buffer stalls. (Hint: Memory stall cycles = Memory
accesses * miss rate * miss penalty)
c).(15 pts) What is the total CPU time of the program (in second)?(Hint: CPU time =(CPU execution
cycles + Memory stall cycles)/ clock rate)
d).(15 pts) What percentage of CPU time was taken by memory stall cycles?
Question 1 ( 6 0 points ) . The program described

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