Question $1.($a$)$ Draw the circuit for an DRAM memory cell, explain its operation in terms of writing and reading a bit from the cell.

$($b$)$ Assume a cache memory with $128$ blocks of data, a main memory with $4096$ blocks of data, and each block consists of $4$ words. Show the format of the main memory address if the cache uses $-$

$$ direct mapping

$$ associative mapping

$$ set$-$associative mapping with $4$ blocks per set