Question: Question 1 : For a direct - mapped cache design with a 3 2 - bit address, the following bits of the address are used

Question 1:
For a direct-mapped cache design with a 32-bit address, the following bits of the address are used to
access the cache.
a. What is the cache block size (in words)?
b. How many entries does the cache have?
c. What is the ratio between total bits required for such a cache implementation over the data
storage bits?
Question 1: For a direct-mapped cache design with a 32-bit address,

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