Question $2(20$ points$).$ Assuming the following functional unit latencies:

$.$ What is the cycle time of a single$-$cycle implementation? What is the cycle time of a pipelined

implementation?

Given the program below:

lw $$a2,0($$$a2)$

bne $$a3,$$$t1,$ Exit

addi $$v0,$$$0,0$

add $$t0,$$$0,$$$0$

add $$t4,$$$a0,$$$a1$

$.$ Plot the pipeline diagram to show the execution of these five instructions. $[$hint: The instruction

sequence is shown vertically, from top to bottom. Clock cycles are shown horizontally, from left to right.

Each instruction is divided into its component stages.$].$