Question $2(40$ points$).$ Whereas larger caches have lower miss rate, they also tend to have longer hit times.

Assume a direct$-$mapped $8$ KB cache has $0\mathrm{.}22$ ns hit time and miss rate $\backslash (\backslash$mathrm$\{$m$1\}\backslash )$; also assume a $4-$way associative $64$ KB cache has $0\mathrm{.}52$ ns hit time and a miss rate m $2.$

a$).(20$pts$)$ If the miss penalty is $100$ ns $,$ when would it be advantageous to use the smaller cache to reduce the overall memory access time?

b$).(20$pts$)$ Repeat part $($a$)$ for miss penalties of $10$ and $100$ cycles. Conclude when it might be advantageous to use the smaller cache?