Question#$2$

An example of a superscalar processor configuration is illustrated in Figure $1.$ The processor

can issue two instructions per cycle if there is no resource conflict and no data dependence

problem. There are fundamentally two pipelines with four processing stages. Each pipeline has

its own fetch decode and store unit. Four functional units include multiplier, adder, logic unit,

and load unit are available for use in the execute stage and are shared by the two pipelines on

a dynamic basis. The two store units can be dynamically used by the two pipelines, depending

on availability at a particular cycle. There is a lookahead window with its own fetch and

decoding logic. This window is used for instruction lookahead for out$-$of$-$order instruction

issue.

The programs to be executed on this processor are as follows:

I$1$: Load R$1,$ A

I$2$: Add R$2,$ R$1$

$13$: Add R$3,$ R$4$

$14$: Mul R$4,$ R$5$

I$5$: Comp R$6$

I$6$: Mul R$6,$ R$7$ a$)$ Determine the dependencies exist in this program.

b$)$ Design the pipeline activity for this program on the processor of Figure $1$ using a

presentation similar to Figure $2$ for the policies as follow:

i$)$ in$-$order issue with in$-$order completion.

ii$)$ in$-$order issue with out$-$of$-$order completion.

iii$)$ out$-$of$-$order issue with out$-$of$-$order completion.

Figure $2$help