QUESTION 2 Refering to the aray multiplier for unsigned numbers in Figure 532 (Slide 5, Module 45) The gate delay to generabe my and qu is The gate delay to generate the carry-out in each full-adder IFA) s The critical path in a 4-bit array multiplier is The total gate delay for a 4-bit array multiplier is If the gate delay is 1/17 ns. how many multiplications can a 4-bit array adder perform per second? full-adders gates Enter your answer is an integer with no commas QUESTION 2 Refering to the aray multiplier for unsigned numbers in Figure 532 (Slide 5, Module 45) The gate delay to generabe my and qu is The gate delay to generate the carry-out in each full-adder IFA) s The critical path in a 4-bit array multiplier is The total gate delay for a 4-bit array multiplier is If the gate delay is 1/17 ns. how many multiplications can a 4-bit array adder perform per second? full-adders gates Enter your answer is an integer with no commas