Question: Question 3 ( a ) The STM 3 2 L 0 3 1 s CPU core is an Arm Cortex M 0 + . It
Question
a The STMLs CPU core is an Arm Cortex M It does not allow data
transfers directly from one memory location to another. If a symbol X is declared as shown below, write the ArmThumb assembler instructions necessary to read the val ue stored at X into register R
AREA DATA
X DCD
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b The MOVS instruction provides an efficient way of loading a limited range of
values into a Cortex M register. What range of values is allowed?
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