Question 4 (25 marks) A static random access memory (SRAM) unit cell operating at VDD=1.8V can be constructed using several CMOS transistors as shown below (Fig. 4.1): Fig. 4.1 (a). What do we usually call the MOSFETs M5 and M6 related to their role in the SRAM cell? (2 marks) (b). What is the minimum number of n-channel MOSFETs and what is minimum number of p channel MOSFETs for implementing the circuit in the dashed-line box (Fig. 4.1)? (2 marks) (c). Sketch a schematic diagram of the circuit in the dashed-line box at the transistor schematic level. You must use the standard circuit symbols of CMOS transistors and show the electrical connections (to M5 \& M6 as well as the power supply and ground) clearly with proper labels. (10 marks) (d). In a dynamic random access memory (DRAM) unit cell, what is the minimum number of devices for the implementation? What are these devices? (5 marks) (e). Compared with the SRAM (Fig. 4.1), state one advantage and one disadvantage of DRAM. (6 marks)