Question $4$

Design a $2-$bit, cyclic binary up$-$counter and use it to implement a circuit that generates continuously the sequence $0111$ and displays it by the output OUT $($the leftmost bit of the sequence is generated when the counter is in the initial state $00).$ The counter increases by $1$ at every positive edge of the clock signal.The final circuit will have the following inputs and outputs $($use exactly these names for inputs and outputs$)$:

clk: Input. Clock signal.

RST: Reset signal. When RST $=1$ the counter is reset to $00.$

OUT: Output