Question $4$: Single Cycle Datapath Control $(12$ points$)$ a$)$ Modify the above datapath $($to the figure directly$)$ so that it supports the

blez instruction. You need to $(1)$ add a single OR gate and an AND gate. $(2)$ finish

the connections from all the blue lines. $(3)$ add proper connections to the

given$/$newly$-$added AND$/$OR gates in the figure.

Do not expand or add any new MUX or other components. Briefly explain how your

modification would support running blez. $(7$ points$)$

b$)$ Complete the table below for control signals, so that the instructions can be

executed correctly in the modified datapath. If a control signal is a "don't care", you

must put $x,$ otherwise no mark will be given to it$.(5$ points$)$

We wish to support the MIPS instruction blez $($branch on less than or equal to zero$)$

as an I$-$type instruction in the modified single$-$cycle datapath below.

The blez instruction is with opcode $000110.$ It compares the values in the rs and

rt registers, where rt register is fixed to be $ zero in the instruction encoding.

If the value in register $rs$ is less than or equal to the value in register rt $($i$.$e$.$

$R[rs]0),$ it will use PC$-$relative addressing mode to calculate the branch target

address and update PC$,$ just like the beq instruction:

$PC=PC+4+$ BranchAddr

Otherwise $($i$.$e$.R[rs]>0),$ then:

$PC=PC+4$

Updates in the modified datapath above are marked in blue, including

a newly added $1-$bit control signal called blez;

a new output that extract bit $31($i$.$e$.$ sign bit$)$ from the ALU result;

and

a newly added OR gate being connected to PCSrc$.$