Question: rewrite the following Verilog code into Verilog 2001 standard // Verilog Code: An 8-3 Priority Encoder (with FOR loop) module FOR_ENC8_3 (A,Y, Valid); //Valid =
rewrite the following Verilog code into Verilog 2001 standard
// Verilog Code: An 8-3 Priority Encoder (with FOR loop) module FOR_ENC8_3 (A,Y, Valid); //Valid = enable pin
input [7:0] A; output reg [2:0] Y; output reg Valid;
integer N;
always @ (A) begin Valid = 0; Y = 3bX; for (N = 0; N < 8; N = N + 1) if (A[N]) begin Valid = 1; Y = N; end end endmodule
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