ROM properties -more than one match possible for some features but pick

only one.

A. Mask ROM B. Programmable ROM C. EPROM D. EEPROM

E. Flash ROM F. EDO-RAM G. BEDO-RAM H. SDRAM

I. Magnetic core J. Fast Page Ram K. Dynamic Ram L. Static Ram

____ Memory controller specifies single row address followed by up to 4 column

addresses to provide improved read speed. Data read/write completed before next column

addressed.

____ "Programmed" by repeated exposing different parts of the semiconductor material

to different chemicals resulting in 'bits' and connections being permanently created in

the surface of the chip.

____ Destructive read, but can maintain store value even without power.

____ Uses either NOR gate technology which can be read like ram memory (byte

addressable) or NAND gate technology which is read at block level like a hard drive.

____ Uses burnable "fuses" that can be blown to set bit to "zero". Technology also

used in programmable logic arrays.

____ Uses transistor flip-flops requiring constant power to keep stored bit.

____ Erasable using ultraviolet light.

____ Uses very small capacitor storage cells requiring regular refresh of the stored

bit.

____ Programmable and erasable at the byte level using a higher than working level

____ Uses isolated floating gate to set/clear bit.

____ Allows controller to specify a single row address followed by up to 4 column

addresses to provide improved read speed. Memory controller addresses next column while

data read/writes completes.

____ Provides the densest read-only memory storage.

____ Provides the densest read/write memory storage.