5. ROM properties. (10 points) - more than one match possible for some features but pick only one A. Mask ROM E. Flash ROM I. Magnetic core J. Fast Page Ram B. Programmable ROM C. EPROM F. EDO-RAM D. EEPROM H. SDRAM G. BEDO-RAM K. Dynamic Ram L. Static Ranm Memory controller specifies single row address followed by up to 4 column addresses to provide improved read speed. Data read/write completed before next columrn addressed "Programmed" by repeated exposing different parts of the semiconductor material to different chemicals resulting in 'bits' and connections being permanently created in the surface of the chip. Destructive read, but can maintain store value even without power. Uses either NOR gate technology which can be read like ram memory (byte addressable) or NAND gate technology which is read at block level like a hard drive Uses burnable "fuses that can be blown to set bit to "zero" . Technology also used in programmable logic arrays. Uses transistor flip-flops requiring constant power to keep stored bit. Erasable using ultraviolet light. Uses very small capacitor storage cells requiring regular refresh of the stored bit. Programmable and erasable at the byte level using a higher than working level Uses isolated floating gate to set/clear bit. Allows controller to specify a single row address followed by up to 4 column addresses to provide improved read speed. Memory controller addresses next column while data read/writes completes