Question: Show the layout of a cache for a CPU that can address 1 6 G 8 of memory; the cache holds 4 M 8 of

Show the layout of a cache for a CPU that can address 16G8 of memory; the cache holds 4M8 of data and has the following mapping strategies. Give the number of bits per location and the total number of locations.
a) Fully associative
b) Direct mapped
c)2-way set-associative
d)4-way set-associative
Show the layout of a cache for a CPU that can

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