Show the state diagram and explain the vhdl

code flow for the next instructions $($I have included an example of what the state diagram should look like$)$:

LDA$\_$DIR

STA$\_$DIR

ADD$\_$AB

BRA

BEQ

State Diagram for LDA$\_$IMM

The following is the state diagram for LDA$\_$IMM. This load instruction will move

information from memory into register A$.$ Immediate addressing implies that the

information to be put into A is provided as the operand of the instruction.

Bus$2,$Selatrom$\_$memory

IR$\_$load

This state will place the PC value into the MAR in order to

provide the address for the gpcode. MAR will be updated with

PC in the next state.

MAR is now holding the address of the opcode. it will take $1$

clock cycle for the memory to provide the opcode after

recelving the address. While waiting, the PC can be

incremented to the next address in the program memory.

The ppcode that has been read from memory is now avallable

on Bus$2$ and can be latched into IR by asserting IR$\_$Load. IR

will be updated with the opcode in the next state.

The epcode now resides in IR and is decoded to determine

which instruction is being executed.

to other instructions.

If $($IR$=$LDA$\_$IMM$)$

"Load A Immediate" means that the operand of the instruction

is the information to be loaded into A$.$ PC is already pointing

to this location in memory so we can put it out on MAR. MAR

will be updated with PC in the next state.

MAR is now holding the address of the operand. It will take $1$

clock cycle for the memory to provide the operand after

receiving the address. While waiting, the PC can be

incremented to the next address in the program memory.

The operand that has been read from memory is now

available on Bus$2$ and can be latched into A by asserting

A$\_$Load. Register A will be loaded with the operand in the

next state $($e$.$g$.$ S$\_$FETCH$\_0).$

We are done executing this instruction so we can return to the

beginning and fetch the opcode of the next instruction. Notice that the

PC is already pointing to the next address in program memory.