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Part1: 6 to 3 High Priority Encoder (schematic) In this part you will be responsible for designing the 6 to 3 Low Priority Encoder shown in the following figure. Figure 1: 6 to 3 high priority encoder block diagram 1. Write the required Boolean expression for the 6 to 3 High Priority Encoder. Also show detailed gate level for the 6 to 3 High Priority Encoder . The gate level (Using AND/OR/INV gates) design should show all inputs and outputs