starting with $F2=(\frac{?}{\text{b}\text{a}\text{r}}(A)\frac{+}{b}ar(B))(A+B).($Hint: distribute the content in the second parentheses to look like $A(\frac{?}{\text{b}\text{a}\text{r}}(A)\frac{+}{b}ar(B))+B(\frac{?}{\text{b}\text{a}\text{r}}(A)\frac{+}{b}ar(B)))$ and then do De Morgan's Law several times.$)$ Note, you can convince yourself that $F1$ is equivalent to $F2$ by the distributive property. Draw the above Boolean expression F$2$ by using only four $2-$input NAND gates based on the method above.

Turn in your derivation of F$2$ using De Morgan's Law and Boolean algebra techniques.

In the above $4-$gate design $($The F$2$ design above$),$ we can reuse the result of the first NAND gate and add one NOT gate to represent the carry bit output carry