SW 2. (20 pts.) In this exercise, we examine how data dependences affect execution in the basic five-stage pipeline described during the lecture. The following questions refer to the below sequence of instructions: lw $5, -16 ( $5) $5, -16 $5) add $5, $5, $5 a) (3 pts.) Indicate dependences and their type. b) (3 pts.) Assume there is no forwarding in this pipelined processor. Indicate hazards and add nop instructions to eliminate them. c) (3 pts.) Assume there is full forwarding. Indicate hazards and add nop instructions to eliminate them. The remaining problems in this exercise assume the following clock cycle times: Without forwarding With full forwarding With ALU-ALU forwarding only 300ps 400ps 360ps d) (4 pts.) What is the total execution time of this instruction sequence without forwarding and with full forwarding? What is the speed-up achieved by adding full forwarding to a pipeline that had no forwarding? e) (3 pts.) Add nop instructions to this code to eliminate hazards if there is ALU-ALU forwarding only (forwarding from EX/MEM staging register, but no forwarding from the MEM/WB staging register)? f) (4 pts.) What is the total execution time of this instruction sequence with only ALU-ALU forwarding? What is the speed-up over a no-forwarding pipeline