System Verilog

sortEight.sv Write a module sortEight, which accepts eight signed values and returns eight signed values sorted from least to greatest. You should submit one le for this problem called sortEight.sv. Any additional modules should be included in the le. You should not change the interface provided below. (Hint: Start by constructing a sortTwo module and then drawing a block diagram for a parallel bubble sort).

// NAME POSTING ID

module sortEight (

input logic signed [ 1 5 : 0 ] A[ 7 : 0 ] ,

output logic signed [ 1 5 : 0 ] B[ 7 : 0 ] ) ;

// B[0] should contain the least ,

// and B[7] should contain the greatest // Your code here

endmodule