Task: Construct a $4-$bit Arithmetic Logic Unit $($ALU$)$ as depicted in Figure $5\mathrm{.}17$ from your textbook, using Logisim and any gates, except for specific restrictions noted below.

Components:

Inputs and Outputs: Incorporate dip switches for the inputs and LEDs for outputs, including the carry, to facilitate testing.

Specifications:

Adder Construction:

Do not use the pre$-$built adder from Logisim$$s arithmetic section.

Utilize your $1-$bit full adder from Problem $2$ as a subcircuit.

Manually connect these $1-$bit adders to form a $4-$bit adder. Ensure all connections and the routing from the $4-$bit input bus to each adder are clearly visible.

Employ splitters for the inputs and outputs of your adder to correctly route the bus inputs to each bit.

Logic Gates:

You may use multi$-$bit gates for logic functions.

Use a $4-$bit multiplexer for selecting output, but not for inversion in subtraction operations.

Implement the controlled inversion for subtraction using an XOR gate as discussed in class.

Follow the overflow logic as taught in class, not as per the textbook$$s method.

Documentation and Image Requirements:

Provide a detailed schematic of the entire $4-$bit ALU setup.

Include a single comprehensive image showing the ALU performing each of the four operations with input values $7$ and $-8($formatted in two's complement$).$ Ensure this image captures the entire circuit setup including dip switches and LEDs.

Figure $5\mathrm{.}17N-$bit ALU with output flags