Term Project Design a 6 bit fully differential current steering DAC for the following specifications Step 1 Design the DAC using ideal current sources Plot the transfer characteristic Step 2 a Design the DAC using PMOS current sources along with the row column decoder Plot transfer characteristics INL and DNL b In the circuit designed above introduce random mismatch in the width of the unit transistors of the current source such that the max deviation is 0 1 Plot the transfer characteristic INL and DNL c Repeat b for maximum deviation of 1 Report to be submitted at the end of the project