The 8086's 6-byte long prefetch queue was a structure that aided processor performance as long as the instruction execution sequence was implemented (with for-next loops/circularly/randomly/linearly/using many branches circle one). Externally, the 8086 had a ____ address/data bus, which meant that the address signals and the data signals shared the same pins on the chip. This meant that the address had to be latched into external circuitry (before/after circle one) the data was on the bus. To accomplished the latching, the 8086 (and 8088) had an additional pin, called ____ to allow the external circuitry to latch in the address. Upon reset, the CS register is loaded with ____ and the instruction pointer register is loaded with ____, for a real-mode physical address of _____ hex