The architecture styles are: AccumulatorAll operations occur between a single register and a memory location. Memory-memoryAll instruction addresses reference only memory locations. StackAll operations occur on top of the stack. Push and pop are the only instructions that access memory; all others remove their operands from the stack and replace them with the result. The implementation uses a hardwired stack for only the top two stack entries, which keeps the processor circuit very small and low in cost. Additional stack positions are kept in memory locations, and accesses to these stack positions require memory references. Load-storeAll operations occur in registers, and register-to-register instructions have three register names per instruction.

Use the four different instruction set architecture styles from above, but assume that the memory operations supported include register indirect as well as direct addressing. Invent your own assembly language mnemonics (Figure A.2 provides a useful sample to generalize), and for each architecture, write the best equivalent assembly language code for this fragment of C code:

for (i = 0; i

Assume that A and B are arrays of 64-bit integers, and C, D, and i are 64-bit integers.

Stack Push A Push B Add Pop C Accumulator Load A Add B Store C Register (register-memory) Load R1, A Add R3, R1,B Store R3,C Register (load-store) Load R1,A Load R2.B Add R3, R1, R2 Store R3, FIGURE A.2 The code sequence for C = A + B for four classes of instruction sets. Stack Push A Push B Add Pop C Accumulator Load A Add B Store C Register (register-memory) Load R1, A Add R3, R1,B Store R3,C Register (load-store) Load R1,A Load R2.B Add R3, R1, R2 Store R3, FIGURE A.2 The code sequence for C = A + B for four classes of instruction sets