The attached file shows the data sheet for chip 74283 which is a 4-bit carry look-ahead adder (a) Use two 74283 chips to design an 8-bit carry look-ahead adder/subtractor. Note that 1. you can use a block (box) to represent 74283 and then add necessary circuits. (b) What are the delays (i.e., gate delays) of the last SUM bit and the last Cout bit of this 8- bit machine, respectively? (c) Based on the circuit designed in (a), can you design a circuit to detect overflow for this 8-bit machine adder/subtractor? If YES, please finish the design for overflow checking, and then go to answer (e) (d) If you answer NO in (c) above, assuming you can break the chips of 74283, please design the overflow checking circuit. (c) Will the addition of overflow checking circuit affect the circuit delay? Use a bit-slice design method to implement a 32-bit magnitude comparator. Thus, (a) design a 1-bit comparator (i.e., a cell), then (2) design the 32-bit magnitude comparator by connecting 32 cells together. 2. 3. Assume you are given two unsigned 4x2 multipliers. How to implement an unsigned 4x-4 multiplier using those two unsigned 4x2 multipliers? Note that you can use binary adders. Design a combinational circuit that will implement a 3-bit 2's complement. For example, if the input is 011, then the output is 10 4