The circuit should have four inputs: A, B, C, and D.

The circuit should have two outputs: W and X.

The output W should be a 1 if and only if there aren't two adjacent 1s in the inputs (i.e. A and B, B and C, or C and D).

The output X should be a 1 if and only if there aren't two adjacent 0s in the inputs.

To complete the PLA:

For each intersection in the AND plane (where intersections occur between the input wires and each possible input value), replace vertical bars with a single x where appropriate. The input value 0 is done for you.

For each intersection in the OR plane (where intersections occur between possible input values and outputs), replace vertical bars with a single x where appropriate.

Again, you should not do any minimization on either of the output variables for this problem. Each row in the truth table corresponds to a column in the PLA. The binary number represented by the four input variables can be matched with the equivalent decimal number above each column in the PLA. (The row with inputs 0000, for instance, can be matched with the column labeled 0, and the row with inputs 1001 can be matched with the column labeled 9.)

0 Fragile (Japanese Drama) - A a2p3 - Notepad File Edit Format ournal X Course Modules: Comp Arc View Help X Assignment 2 (Part 3): Comb X MUU 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 ------------------------------------------------ ------------------------------------------------ ----------------------I---------|----------------- -x---I---------------I---------|-------------------- ---|--------- I--------------- -----------------------------|------------- --- ------ ------- |---|---------------------| -----------| ---------------------------| ------------ II LITT TILL w TTTT --------------------------------------------|--W --------- ---------------I----------------------- X 100% In 1, Col 1 UTF-8 Unix (LP)