Question: The following code fragment is executed on a CPU with a 5stage pipelined datapath with no pipeline forwarding. Assume that this CPU has separate instruction

 The following code fragment is executed on a CPU with a
5stage pipelined datapath with no pipeline forwarding. Assume that this CPU has

The following code fragment is executed on a CPU with a 5stage pipelined datapath with no pipeline forwarding. Assume that this CPU has separate instruction and data memory and avoids all structural hazards. add $1, $3, $2 1w $7, 4204$11 sub $7, $3, $4 sub $2, $4, $5 bne $4, $5, End 1w $7, 4554$21 add $7, $3, $1 addi $12, $0, 14 End: Part A [5 points}: Identify all data hazards, loaduse hazards and control hazards. Are any hazards conditional upon whether or not the branch is taken? If so, identify them. Part 31:5 points}: Rewrite the code to avoid all data, load-use and control hazards by inserting nops. How many cycles does the code take to execute when the branch is taken? How about when it is not taken? Part (31:5 points}: Can you improve your code from Part B by removing some of the nop instructions and instead eliminating one or more hazards by reordering the instructions? If so, write the improyed code. Part D {5 points}: Now suppose that we add pipeline forwarding to the architecture. Write a nal version of the code based on your answer to Part C, removing any instructions that are no longer necessary. How many cycles does the code take to execute when the branch is taken? How about when the branch is not tal-cen

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